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| Title | Author(s) | ???itemlist.dc.contributor.other??? | ???itemlist.dc.contributor.editor??? | ???itemlist.dc.identifier.issn??? | ???itemlist.dc.degree.name??? | ???itemlist.dc.degree.department??? | Type |
|---|---|---|---|---|---|---|---|
| Implementación en hardware de un sumador de punto flotante basado en el estándar IEEE 754-2008 | - | - | - | - | - | - | info:eu-repo/semantics/article; info:eu-repo/semantics/publishedVersion |
| Implementación en hardware de un SVPWM en un Soft-Core Nios II. Parte I | - | - | - | - | - | - | info:eu-repo/semantics/article; info:eu-repo/semantics/publishedVersion |
| Tutorial para el modelado de un bloque acelerador de video utilizando system generator | - | - | - | - | - | - | info:eu-repo/semantics/article; info:eu-repo/semantics/publishedVersion |